Welcome to our conference program overview !
    This page allows you to:

  • ...download the Advance Program
  • ...browse through the program by using the navigation bars on the left
  • ...follow the links below to jump to a specific session

 

CONFERENCE-AT-A-GLANCE

Wednesday, September 17

Registration
7:00 a.m. -
5:00 p.m.

 

 

 

Plenary Session
8:30 a.m. -
10:30 a.m.

Opening Remarks:
   John Chickanosky, General Conference Chair
Technical Program Overview:
   Dong Ha, Technical Program Chair
Keynote Presentation:
   Hyung Kyu Lim,
   President, System LSI Business, Samsung Electronics
Plenary Presentations:
   Mi-Chang Chang,
   Director of Design Service Division, TSMC
  
Dennis Buss,
   Vice President, Silicon Technology Development,Texas Instruments

Technical Sessions
10:40 a.m. -
11:55 a.m.

Track A
WA1: EMBEDDED MEMORIES

Track B
WB1: DSP ARCHITECTURES

Track C
WC1: ON-CHIP COMMUNICATION CIRCUITS

Lunch
11:55 a.m. -
1:10 p.m.

(on your own)

 

 

Technical Sessions
1:10 p.m. -
2:50 p.m.

Track A
WA2: SOC METHODOLOGIES

Track B
WB2: RF CIRCUITS

Track C
WC2: TECHNOLOGY ISSUES FOR SOC DESIGN

3:10 p.m. -
4:25 p.m.

WA3: EMBEDDED SYSTEMS

WB3: MULTIMEDIA PROCESSORS

WC3: DSP CIRCUITS

Opening Reception
4:30 p.m. -
5:30 p.m.

 

Panel Discussion
5:30 p.m. -
7:00 p.m.

 

Thursday, September 18

Registration
7:30 a.m. -
5:00 p.m.

 

 

Technical Sessions
8:40 a.m. -
10:20 a.m.

Track A
TA1: LOW-POWER LOGIC AND CIRCUITS

Track B
TB1: INTERCONNECT MODELING AND FLOORPLANNING

10:40 a.m. -
11:55 a.m.

TA2: ENERGY EFFICIENT CLOCKLESS CIRCUITS

TB2: EMBEDDED TUTORIAL
Status and Challenges of SoC Verification for Embedded Systems Market

Lunch
11:55 a.m. -
1:10 p.m.

(on your own)

 

Technical Sessions
1:10 p.m. - 2:50 p.m.

Track A
TA3: POWER AWARE ARCHITECTURE

Track B
TB3: PHYSICAL ANALYSIS AND DESIGN

Panel Discussion
3:10 p.m. - 4:25 p.m.

“What is available in IPP and how can you profit from it?
Moderator: Pat Sullivan, Intellectual Capital Management Group, Inc.

4:50 p.m. - 5:50 p.m.

POSTER SESSION

Conference Banquet
6:00 p.m. -
7:00 p.m.

Banquet Presentation:
A History of Speak-and-Spell and How DSP Evolved
Gene Frantz, Texas Instruments

Friday, September 19

Registration
8:00 a.m. -
3:30 p.m.

 

 

Technical Sessions
8:40 a.m. -
10:20 a.m.

Track A
FA1: MIXED-SIGNAL CIRCUITS I

Track B
FB1: WIRELESS APPLICATIONS

10:40 a.m. -
11:55 a.m.

FA2: ANALOG CIRCUITS

FB2: EMBEDDED TUTORIAL
Library Characterization and Modeling for 130nm and 90nm SOC Design

Lunch
11:55 a.m. - 1:10 p.m.

 

 

Technical Sessions
1:10 p.m. - 2:50 p.m.

Track A
FA3: MIXED-SIGNAL CIRCUITS II

Track B
FB3: ASIC APPLICATIONS

3:10 p.m. - 4:25 p.m.

FA4: NETWORKING

FB4: LOW-POWER COMMUNICATION SYSTEMS

Important note for workshop registrants

Please note that the advance program and the conference registration form contained a misleading information, listing all workshops as separate units.
The seven workshops are grouped into two parallel morning sessions with two workshops each, and an afternoon session with three workshops (see below).

You can register for sessions only, not for individual workshops. If you have already registered for a workshop using the old registration form, your registration will count towards the whole session.

Saturday, September 20 - Tutorial Workshops

Morning Workshops

Session TW1

Session TW2

8:00 a.m. - 10:00 a.m.

TW1.1:
Intelligent Energy Management for Portable Embedded Systems,
K. Flautner and D. I. Patel, ARM, Cambridge, United Kingdom

TW2.1:
Advanced Circuit Techniques for High-Performance Microprocessor Design Challenges,
S. Mathew, Intel, Hillsboro, OR

10:00 a.m. -12:00 p.m.

TW1.2:
Dynamic Power Management for Embedded System,
B. Brock and K. Rajamani, IBM, Austin, TX

TW2.2:
Low Power SOC in Deep-Submicron Era,
Y. Lee, Samsung Electronics, Korea

 

 

Afternoon Workshops

Session TW3

 

1:00 p.m. - 2:30 p.m.

TW3.1:
New Trends in Low Power SOC Design Technology,
W. Hwang, National ChiaoTung University, Hsinchu, Taiwan

2:30 p.m. - 4:00 p.m.

TW3.2:
Design of Nanometer Scale CMOS Circuit,
K. Roy, PurdueUniversity, Lafayette, IN

4:00 p.m. - 5:30 p.m.

TW3.3:
Energy Recovery Design for Low-Power ASIC,
C. H. Ziesler, J. Kim, and M. C. Papaefthymiou, University of Michigan, Ann Arbor, MI